Field of the Invention
The present invention relates to an image pickup device and an image pickup apparatus, and more particularly to a technique concerning a circuit forming the image pickup device.
Description of the Related Art
Conventionally, there has been developed an image pickup apparatus, such as a digital camera and a digital video camera, which records a shot image using a CMOSAPS (complementary metal oxide semiconductor active pixel sensor) as an image pickup device. The image pickup device includes a pixel section and a peripheral circuit section. The peripheral circuit section reads out a signal from each pixel and is output to the outside as an image signal. The pixel section performs photoelectric conversion by photo diodes, and a pixel circuit formed in the pixel section reads out a signal obtained by photoelectric conversion to the peripheral circuit section.
In recent years, as the pixel becomes finer, as for inside each pixel, the number of circuits is reduced as much as possible and the area of a photo diode is increased, whereby the performance of the image pickup device is ensured. Further, as the function of the image pickup device is improved, the area of the peripheral circuit section is also increased. Therefore, a technique for forming the pixel section and the peripheral circuit section on respective separate chips is being developed. The technique disclosed in Japanese Patent Laid-Open Publication No. 2008-211220 employs a method in which a pixel is formed only by a photo diode and some of switches, and the other switches are formed in a separate chip.
FIG. 27 is a schematic block diagram useful in explaining a conventional image pickup device.
The image pickup device includes a pixel section 101′, a vertical selection circuit 102′ for selecting at least one of rows of pixels in the pixel section 101′, and column circuits 103′ each of which performs predetermined processing on signals read from pixels on a row selected by the vertical selection circuit 102′ in the pixel section 101′. The image pickup device further includes column memories 104′ each of which holds signals which have been processed by the column circuits 103′ on a column basis, horizontal selection circuits 105′ each of which selects a column of signals held in the column memories 104′, and output signal lines 106′ each for reading out a signal from a column selected by an associated one of the horizontal selection circuits 105′ to an associated one of output circuits 107′. Note that the image pickup device further includes not only illustrated components but also a timing generator which supplies a timing signal to each of the vertical selection circuit 102′, the horizontal selection circuits 105′, the column circuits 103′, etc., a control circuit, and so forth.
The vertical selection circuit 102′ sequentially selects a plurality of rows in the pixel section 101′, and outputs selected signals to the column memories 104′. The horizontal selection circuits 105′ sequentially select signals held in the respective associated column memories 104′, and output selected signals to the respective associated output circuits 107′ through the associated output signal lines 106′. The pixel section 101′ is formed by arranging a plurality of pixels in a two-dimensional array in order to provide a two-dimensional image. These circuits are formed on one semiconductor substrate, and along with finer designing of a semiconductor process, reduction of a pixel pitch and reduction of the area of peripheral circuits are in progress.
FIG. 28 is a diagram showing the configuration of one pixel in the conventional image pickup device, and the configuration of a circuit for reading out a signal from the pixel.
As shown in FIG. 28, a pixel array which provides a two-dimensional image is formed by arranging a plurality of pixels in a two-dimensional array. Each pixel 201′ is configured to include a photo diode (hereinafter also referred to as the “PD”) 202′, a transfer switch 203′, a floating diffusion (hereinafter also referred to as the “FD”) 204′, a reset switch 207′, a MOS amplifier 205′, and a selection switch 206′.
The PD 202′ functions as a photoelectric conversion element which converts light incident through an optical system to an electric signal by photoelectric conversion to thereby generate electric charges. The anode of the PD 202′ is connected to a ground line, and the cathode of the PD 202′ is connected to the source of the transfer switch 203′. The transfer switch 203′ is driven by a transfer pulse ϕTX input to a gate terminal thereof to transfer the electric charges generated in the PD 202′ to the FD 204′. The FD 204′ functions as a charge-voltage converting section which temporarily accumulates electric charges and converts the accumulated electric charges to a voltage signal.
The MOS amplifier 205′ functions as a source follower, and has a gate to which the voltage signal converted from the electric charges in the FD 204′ is input. Further, the MOS amplifier 205′ has a drain connected to a first power line VDD1 for supplying a first potential, and a source connected to the selection switch 206′. The selection switch 206′ is driven by a vertical selection pulse ϕSEL input to a gate thereof, and has a drain connected to the MOS amplifier 205′, and a source connected to a vertical signal line (column signal line) 208′. When the vertical selection pulse ϕSEL becomes an active level (high level), the selection switch 206′ of each pixel belonging to the corresponding row on the pixel array becomes conductive, whereby the source of the MOS amplifier 205′ is connected to the vertical signal line 208′.
The reset switch 207′ has a drain connected to a second power line VDD2 for supplying a second potential (reset potential), and a source connected to the FD 204′. Further, the reset switch 207′ is driven by a reset pulse ϕRES input to a gate thereof to remove electric charges accumulated in the FD 204′.
A floating diffusion amplifier is formed by not only the FD 204′ and the MOS amplifier 205′, but also a constant current source 209′ for supplying a constant current to the vertical signal line 208′. In each of pixels forming the row selected by the selection switch 206′, the electric charges transferred from the PD 202′ to the FD 204′ is converted to the voltage signal by the FD 204′, and the voltage signal is output to the vertical signal line (column signal line) 208′ provided on a column basis through the floating diffusion amplifier.
The column circuits 103′ connected to the vertical signal lines (column signal lines) 208′ are each implemented e.g. by a CDS (correlated double sampling) circuit and a gain amplifier. Further, the column circuits 103′ are formed by respective circuits each having the same configuration on a column basis. A signal processed by the column circuit 103′ is held in an associated one of the column memories 104′. The signal held in the column memory 104′ is transferred to the output circuit 107′ through the output signal line 106′. The output circuit 107′ performs amplification, impedance conversion, and so forth on the input signal, and outputs the processed signal to the outside of the image pickup device.
However, in the technique described in Japanese Patent Laid-Open Publication No. 2008-211220, chips are connected via the floating diffusions in each of which the signal is faint among all signals within the pixel, and hence variation in the manufacturing of products of the FD results in variation in the capacity value of the FD, which causes PRNU (photo response non-uniformity) and DSNU (dark signal non-uniformity). Further, although the layout and position of a readout circuit is not described in Japanese Patent Laid-Open Publication No. 2008-211220, it is desirable to more efficiently lay out and position the reading circuit than the prior art, since the pixel section and the peripheral circuit section are formed on separate chips. Further, recently, a circuit which realizes a plurality of functions has come to be introduced into the peripheral circuits, as in the case where an analog-to-digital converter is introduced into the column circuit, on a column basis, and hence the chip areas of the peripheral circuits are increased. This brings about not only a problem that heat generated in the peripheral circuits generates dark current in the PD 202′ in each pixel, but also a problem that the dark current becomes non-uniform in a screen-associated region if the peripheral circuits are biased in arrangement.